![]() | Olivier Ginez |
| IM2NP Site Polytech 38, rue Frédéric Joliot-Curie IMT Technopôle de Château Gombert 13451 Marseille Cedex 20 France | |
| téléphone : + 33 (0) 4 91 05 47 87 | |
| mail : olivier.ginez@im2np.fr |
Maître de conférences Université d'Aix-Marseille
Domaine d'activité : design et test de mémoires non volatiles type FLASH
Publications
H. Aziza, E. Bergeret, J.-M. Portal and O. Ginez“A New Low Power Oriented Design Methodology for Analog Blocks”, Journal of Low Power Electronics 2008, Vol. 4, No. 1, p. 60-67, 2008
Conférences internationales avec actes et comité de lecture à diffusion publique
O. Ginez, J.-M. Daga, M. Combe, P. Girard, C. Landrault, S. Pravossoudovitch, A. Virazel“An Overview of Failure Mechanisms in Embedded Flash Memories”24th IEEE VLSI Test Symposium,
O. Ginez, J.-M. Daga, P. Girard, C. Landrault, S. Pravossoudovitch, A. Virazel“Embedded Flash Testing: Overview and Perspectives”1st IEEE International Conference on Design and Test of Integrated Systems,
O. Ginez, P. Girard, C. Landrault, S. Pravossoudovitch, A. Virazel, J.-M. Daga“Retention and Reliability Problems in Embedded Flash Memories: Analysis and Test of Defective 2T-FLOTOX Tunnel Window”25th IEEE VLSI Test Symposium,
O. Ginez, P. Girard, C. Landrault, S. Pravossoudovitch, A. Virazel, J.-M. Daga“Electrical Simulation Model of the 2T-FLOTOX Core cell for Defect Injection and Faulty Behavior Prediction in eFlash”12th IEEE European Test Symposium,
O. Ginez, P. Girard, C. Landrault, S. Pravossoudovitch, A. Virazel, J.-M. Daga“A Concurrent Approach for Testing Address Decoder Faults in eFlash Memories”IEEE International Test Conference,
H. Aziza, J.-M. Portal, O. Ginez and E. Bergeret“An Efficient Diagnosis Methodology for Charge Pump Circuits: Application to Flash EEPROM Devices”Accepted to appear in Proc. of the 3rd IEEE International Conference on Design and Test of Integrated Systems,
O. Ginez, H. Aziza, J.-M. Portal“Reliability Issues in Flash Memories: An On-Line Diagnosis and Repair Scheme for Word Line Drivers”Proc. of the 14th IEEE IMS3TW,
H. Aziza, J.-M. Portal, O. Ginez and E. Bergeret“An efficient Diagnosis Methodology for Analog Blocks: Application to Current Reference Circuits”Accepted to appear in Proc. of the 13th IEEE European Test Symposium,
Thèse
O. Ginez,“Fault Modeling and Testing of Flash Memories”Thèse de doctorat, Université Montpellier II, Montpellier, 2007,142 pages.
O. Ginez, J-M. Daga, P. Girard, C. Landrault, S. Pravossoudovitch, A. Virazel“Embedded Flash Testing”Groupement de Recherche SoC/SiP, Paris, France, 6 Juin 2007.
