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Hassan Aziza,
J. Postel-Pellerin,
Mathieu Moreau,
Experimental Analysis of Oxide-Based RAM Analog Synaptic Behavior, Electronics, 2022, 12, pp.49
(10.3390/electronics12010049)
(hal-03941057) |
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Hassen Aziza,
J. Postel-Pellerin,
Mathieu Moreau,
STATE: A Test Structure for Rapid and Reliable Prediction of Resistive RAM Endurance, IEEE Transactions on Device and Materials Reliability, 2022, 22, pp.500-505
(10.1109/TDMR.2022.3213191)
(hal-03941082) |
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Hassen Aziza,
J. Postel-Pellerin,
Hussein Bazzi,
Mathieu Moreau,
Adnan Harb,
STATE: A Test Structure for Rapid Prediction of Resistive RAM Electrical Parameter Variability, IEEE International Symposium on Circuits and Systems (ISCAS) 2022, 2022, pp.3532-3536
(10.1109/ISCAS48785.2022.9937716)
(hal-03941188) |
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Hassen Aziza,
Said Hamdioui,
Moritz Fieback,
Mottaqiallah Taouil,
Mathieu Moreau,
Patrick Girard,
Arnaud Virazel,
Karine Coulié,
Density Enhancement of RRAMs using a RESET Write Termination for MLC Operation, Microelectronics Reliability, 2021, 126, pp.1877-1880
(10.23919/DATE51398.2021.9473967)
(hal-03504284) |
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Hussein Bazzi,
Hassen Aziza,
Mathieu Moreau,
Adnan Harb,
Performances and Stability Analysis of a novel 8T1R Non-volatile SRAM (NVSRAM) versus Variability, Journal of Electronic Testing: : Theory and Applications, 2021, 37, pp.515-532
(10.1007/s10836-021-05965-x)
(hal-03501909) |
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Hassen Aziza,
Said Hamdioui,
Moritz Fieback,
Mottaqiallah Taouil,
Mathieu Moreau,
Patrick Girard,
Arnaud Virazel,
K. Coulié,
Multi-Level Control of Resistive RAM (RRAM) Using a Write Termination to Achieve 4 Bits/Cell in High Resistance State, Electronics, 2021, 10, pp.#2222
(10.3390/electronics10182222)
(lirmm-03377249) |
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Hussein Bazzi,
Adnan Harb,
Hassen Aziza,
Mathieu Moreau,
Abdallah Kassem,
RRAM-based non-volatile SRAM cell architectures for ultra-low-power applications, Analog Integrated Circuits and Signal Processing, 2021, 106, pp.351-361
(10.1007/s10470-020-01587-z)
(hal-03504286) |
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Valentin Egloff,
Jean-Philippe Noël,
Maha Kooli,
Bastien Giraud,
Lorenzo Ciampolini,
Roman Gauchi,
César Fuguet,
Eric Guthmuller,
Mathieu Moreau,
Jean-Michel Portal,
Storage class memory with computing row buffer: A design space exploration, 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2021, 2021, pp.1-6
(10.23919/DATE51398.2021.9473992)
(cea-03605068) |
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Hussein Bazzi,
J. Postel-Pellerin,
Hassen Aziza,
Mathieu Moreau,
Adnan Harb,
Resistive RAM SET and RESET Switching Voltage Evaluation as an Entropy Source for Random Number Generation, 2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2020, pp.1-4
(10.1109/DFT50435.2020.9250726)
(hal-03504288) |
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Hussein Bazzi,
Adnan Harb,
Hassen Aziza,
Mathieu Moreau,
Non-volatile SRAM memory cells based on ReRAM technology, SN Applied Sciences, 2020, 2
(10.1007/s42452-020-03267-z)
(hal-03504289) |
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Hussein Bazzi,
Hassen Aziza,
Mathieu Moreau,
Adnan Harb,
Design of a Novel Hybrid CMOS Non-Volatile SRAM Memory in 130nm RRAM Technology, Design, Technology, and Test of Integrated Circuits and Systems, 2020
(10.1109/DTIS48698.2020.9081153)
(hal-03504830) |
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Hassen Aziza,
Mathieu Moreau,
M. Fieback,
M. Taouil,
S. Hamdioui,
An Energy-Efficient Current-Controlled Write and Read Scheme for Resistive RAMs (RRAMs), IEEE Access, 2020, 8, pp.137263-137274
(10.1109/ACCESS.2020.3011647)
(hal-03504829) |
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Alexandre Levisse,
Marc Bocquet,
Marco Rios,
Mouhamad Alayan,
Mathieu Moreau,
Etienne Nowak,
Gabriel Molas,
E. Vianello,
David Atienza,
Jean-Michel Portal,
Write Termination circuits for RRAM : A Holistic Approach From Technology to Application Considerations, IEEE Access, 2020, pp.109297-109308
(10.1109/ACCESS.2020.3000867)
(hal-02863232) |
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Hassen Aziza,
J. Postel-Pellerin,
Hussein Bazzi,
Pierre Canet,
Mathieu Moreau,
V. Della Marca,
Adnan Harb,
True Random Number Generator Integration in a Resistive RAM Memory Array Using Input Current Limitation, IEEE Transactions on Nanotechnology, 2020, 19, pp.214-222
(10.1109/TNANO.2020.2976735)
(hal-03504843) |
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J. Postel-Pellerin,
Hussein Bazzi,
Hassen Aziza,
Pierre Canet,
Mathieu Moreau,
V. Della Marca,
Adnan Harb,
True random number generation exploiting SET voltage variability in resistive RAM memory arrays, 2019 19th Non-Volatile Memory Technology Symposium (NVMTS), 2019, pp.1-5
(10.1109/NVMTS47818.2019.9043369)
(hal-03504849) |
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M. Alayan,
E. Muhr,
A. Levisse,
Marc Bocquet,
Mathieu Moreau,
E. Nowak,
G. Molas,
E. Vianello,
Jean-Michel Portal,
Switching Event Detection and Self-Termination Programming Circuit for Energy Efficient ReRAM Memory Arrays, IEEE Transactions on Circuits and Systems II: Express Briefs, 2019, 66, pp.748-752
(10.1109/TCSII.2019.2908967)
(hal-02158840) |
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Hassen Aziza,
Hassan Bazzi,
J. Postel-Pellerin,
Pierre Canet,
Mathieu Moreau,
A. Harb,
An Augmented OxRAM Synapse for Spiking Neural Network (SNN) Circuits, 2019 14th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS), 2019
(10.1109/DTIS.2019.8735057)
(hal-02306907) |
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Hassen Aziza,
Mathieu Moreau,
Jean-Michel Portal,
Arnaud Virazel,
Patrick Girard,
A Capacitor-Less CMOS Neuron Circuit for Neuromemristive Networks, NEWCAS 2019 - 17th IEEE International Conference on Electronics Circuits and Systems, 2019
(10.1109/NEWCAS44328.2019.8961278)
(lirmm-02395325) |
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Jean-Michel Portal,
Marc Bocquet,
Santhosh Onkaraiah,
Mathieu Moreau,
Hassen Aziza,
Damien Deleruyelle,
Kholdoun Torki,
E. Vianello,
Alexandre Levisse,
Bastien Giraud,
Olivier P Thomas,
Fabien Clermidy,
Design and Simulation of a 128 kb Embedded Nonvolatile Memory Based on a Hybrid RRAM (HfO$_2$ )/28 nm FDSOI CMOS Technology, IEEE Transactions on Nanotechnology, 2017, 16, pp.677 - 686
(10.1109/TNANO.2017.2703985)
(hal-01745418) |
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Alexandre Levisse,
P. Royer,
Bastien Giraud,
J.P. Nöel,
Mathieu Moreau,
Jean-Michel Portal,
Architecture, design and technology guidelines for crosspoint memories, 2017 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), 2017, 16, pp.677 - 686
(10.1109/NANOARCH.2017.8053733)
(hal-01788148) |
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Hassen Aziza,
Pierre Canet,
J. Postel-Pellerin,
Mathieu Moreau,
Jean-Michel Portal,
Marc Bocquet,
ReRAM ON/OFF resistance ratio degradation due to line resistance combined with device variability in 28nm FDSOI technology, 2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), 2017
(10.1109/ULIS.2017.7962594)
(hal-01745666) |
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A. Levisse,
B G Giraud,
J.P. Noel,
Mathieu Moreau,
Jean-Michel Portal,
High density emerging resistive memories: What are the limits?, 2017 IEEE 8th Latin American Symposium on Circuits & Systems (LASCAS), 2017
(10.1109/LASCAS.2017.7948104)
(hal-01788136) |
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Alexandre Levisse,
Bastien Giraud,
Jean-Philippe Noël,
Mathieu Moreau,
Jean-Michel Portal,
Capacitor based SneakPath compensation circuit for transistor-less ReRAM architectures, Proceedings of the 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), 2016, pp.7-12
(10.1145/2950067.2950073)
(hal-01435118) |
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Hassen Aziza,
H. Ayari,
S. Onkaraiah,
Mathieu Moreau,
Jean-Michel Portal,
Marc Bocquet,
Multilevel Operation in Oxide Based Resistive RAM with SET voltage modulation, 2016 11TH IEEE INTERNATIONAL CONFERENCE ON DESIGN & TECHNOLOGY OF INTEGRATED SYSTEMS IN NANOSCALE ERA (DTIS), 2016, pp.1-5
(10.1109/DTIS.2016.7483892)
(hal-01434981) |
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Alexandre Levisse,
Bastien Giraud,
Jean-Philippe Noël,
Mathieu Moreau,
Jean-Michel Portal,
SneakPath compensation circuit for programming and read operations in RRAM-based CrossPoint architectures, 2015 15th Non-Volatile Memory Technology Symposium (NVMTS), 2015
(10.1109/NVMTS.2015.7457426)
(hal-01745689) |
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Hassen Aziza,
Marc Bocquet,
Mathieu Moreau,
Jean-Michel Portal,
A Built-In Self-Test Structure (BIST) for Resistive RAMs Characterization: Application to Bipolar OxRRAM, Solid-State Electronics, 2015, 103, pp.73 - 78
(10.1016/j.sse.2014.09.005)
(hal-01737300) |
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Hassen Aziza,
Haytem Ayari,
Santhosh Onkaraiah,
Jean-Michel Portal,
Mathieu Moreau,
Marc Bocquet,
Oxide based resistive RAM: ON/OFF resistance analysis versus circuit variability, 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2014
(10.1109/DFT.2014.6962107)
(hal-01745718) |
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Jean-Michel Portal,
Marc Bocquet,
Mathieu Moreau,
Hassen Aziza,
Damien Deleruyelle,
Yue Zhang,
Wang Kang,
Jacques-Olivier O Klein,
Youguang Zhang,
Claude Chappert,
Weisheng Zhao,
An Overview of Non-Volatile Flip-Flops Based on Emerging Memory Technologies, Journal of Electronic Science and Technology, 2014, 12, pp.173 - 181
(10.3969/j.issn.1674-862X.2014.02.007)
(hal-01745646) |
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W. Zhao,
M. Portal,
W. Kang,
Mathieu Moreau,
Y. Zhang,
Hassen Aziza,
J.-O. Klein,
Z.H. Wang,
D. Querlioz,
Damien Deleruyelle,
Marc Bocquet,
D. Ravelosona,
Christophe Muller,
C. Chappert,
Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells, Journal of Parallel and Distributed Computing, 2014, 74, pp.2484 - 2496
(10.1016/j.jpdc.2013.08.004)
(hal-01744000) |
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Weisheng Zhao,
Mathieu Moreau,
Erya Deng,
Yue Zhang,
Jean-Michel Portal,
Jacques-Olivier O Klein,
Marc Bocquet,
Hassen Aziza,
Damien Deleruyelle,
Christophe Muller,
D. Querlioz,
Nesrine Ben Romdhane,
Dafiné Ravelosona,
Claude Chappert,
Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories, IEEE Transactions on Circuits and Systems I: Regular Papers, 2014, 61, pp.443 - 454
(10.1109/TCSI.2013.2278332)
(hal-01743999) |
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Hassen Aziza,
Marc Bocquet,
Mathieu Moreau,
Jean-Michel Portal,
Single-ended sense amplifier robustness evaluation for OxRRAM technology, 2013 IEEE Design and Test Symposium (IDT), 2013
(10.1109/IDT.2013.6727097)
(hal-01745737) |
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Hassen Aziza,
Marc Bocquet,
Mathieu Moreau,
Jean-Michel Portal,
A Built-In Self-Test Structure (BIST) for Resistive RAMs Characterization: Application to Bipolar OxRRAMs, International Semiconductor Device Research Symposium, 2013
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(hal-01745729) |
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Hassen Aziza,
Marc Bocquet,
Jean-Michel Portal,
Mathieu Moreau,
Christophe Muller,
A novel test structure for OxRRAM process variability evaluation, Microelectronics Reliability, 2013, 53, pp.1208 - 1212
(10.1016/j.microrel.2013.07.012)
(hal-01745650) |
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Jean-Michel Portal,
Mathieu Moreau,
Marc Bocquet,
Hassen Aziza,
Damien Deleruyelle,
Christophe Muller,
Yue Zhang,
Erya Deng,
Jacques-Olivier O Klein,
D. Querlioz,
Dafiné Ravelosona,
Claude Chappert,
Weisheng Zhao,
Analytical study of complementary memristive synchronous logic gates, 2013 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), 2013
(10.1109/NanoArch.2013.6623047)
(hal-01745759) |
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Jean-Michel Portal,
Mathieu Moreau,
Marc Bocquet,
Hassen Aziza,
Damien Deleruyelle,
Christophe Muller,
Y. Zhang,
E. Deng,
J.O O Klein,
D. Querlioz,
D. Ravelosona,
C. Chappert,
W.S. S Zhao,
M. Portal,
Analytical study of complementary memristive synchronous logic gates, 2013 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), 2013
(10.1109/NanoArch.2013.6623047)
(hal-01827052) |
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M Zhang,
Yousra Chabchoub,
Jacques-Olivier O Klein,
D. Querlioz,
Dafiné Ravelosona,
Claude Chappert,
Weisheng S Zhao,
Mathieu Moreau,
Jean-Michel Portal,
Marc Bocquet,
Hassen Aziza,
Damien Deleruyelle,
C Muller,
Synchronous Full-Adder based on Complementary Resistive Switching Memory Cells, 11th International New Circuits and Systems Conference (NEWCAS), 2013
(10.1109/NEWCAS.2013.6573578)
(hal-01840795) |
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Daniela Munteanu,
Mathieu Moreau,
Jean-Luc Autran,
Effects of localized gate stack parasitic charge on current-voltage characteristics of double-gate MOSFETs with high-permittivity dielectrics and Ge-channel, Journal of Non-Crystalline Solids, 2011, 357, pp.1879-1883
(10.1016/j.jnoncrysol.2010.12.046)
(hal-01430098) |
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Mathieu Moreau,
Daniela Munteanu,
Jean-Luc Autran,
Simulation study of Short-Channel Effects and quantum confinement in double-gate FinFET devices with high-mobility materials, Microelectronic Engineering, 2011, 88, pp.366-369
(10.1016/j.mee.2010.08.026)
(hal-01430097) |
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Daniela Munteanu,
Jean-Luc Autran,
Mathieu Moreau,
Quantum Compact Model of Drain Current in Independent Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistors, Japanese Journal of Applied Physics, 2011, 50
(10.1143/JJAP.50.024301)
(hal-01430093) |
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Daniela Munteanu,
Mathieu Moreau,
Jean-Luc Autran,
Effects of gate stack parasitic charge on current-voltage characteristics of high-k/SiO2/Ge-channel Double-Gate MOSFETs, 8th Symposium SiO2, Advanced Dielectrics and Related Devices (2010), 2010
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(hal-04393620) |
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Mathieu Moreau,
Daniela Munteanu,
Jean-Luc Autran,
Simulation study of short-channel effects and quantum confinement in Double-Gate FinFET devices with high-mobility materials, European-Material Research Society (E-MRS) 2010 Spring Meeting, 2010
()
(hal-04393626) |
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Mathieu Moreau,
Daniela Munteanu,
Jean-Luc Autran,
Simulation of Gate Tunneling Current in Metal-Insulator-Metal Capacitor with Multi layer High-kappa Dielectric Stack Using the Non-equilibrium Green's Function Formalism, Japanese Journal of Applied Physics, 2009, 48
(10.1143/JJAP.48.111409)
(hal-01430110) |
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Daniela Munteanu,
Jean-Luc Autran,
Mathieu Moreau,
M. Houssa,
Electron transport through high-kappa dielectric barriers: A non-equilibrium Green's function (NEGF) study, Journal of Non-Crystalline Solids, 2009, 355, pp.1180-1184
(10.1016/j.jnoncrysol.2009.03.006)
(hal-01430113) |
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Mathieu Moreau,
Daniela Munteanu,
Jean-Luc Autran,
F. Bellenger,
J. Mitard,
M. Houssa,
Investigation of capacitance-voltage characteristics in Ge/high-kappa MOS devices, Journal of Non-Crystalline Solids, 2009, 355, pp.1171-1175
(10.1016/j.jnoncrysol.2009.01.056)
(hal-01430114) |
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Daniela Munteanu,
Mathieu Moreau,
Jean-Luc Autran,
A Compact Model for the Ballistic Subthreshold Current in Ultra-Thin Independent Double-Gate MOSFETs, Molecular Simulation, 2009, 35, pp.491-497
(10.1080/08927020902801548)
(hal-00515080) |
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Mathieu Moreau,
Daniela Munteanu,
Jean-Luc Autran,
Florence Bellenger,
Jérome Mitard,
Michel Houssa,
Quantum Simulation of C-V and I-V Characteristics in Ge and III-V Materials/High-κ MOS Devices, MRS Online Proceedings Library, 2009, 1194, pp.1194-A02-02
(10.1557/PROC-1194-A02-02)
(hal-01745840) |
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Daniela Munteanu,
Jean-Luc Autran,
Mathieu Moreau,
3D Simulation Analysis of Bipolar Amplification in Planar Double-Gate and FinFET with Independent Gates, Conference on Radiation Effects on Components and Systems (RADECS), 2008, pp.280-283
(10.1109/RADECS.2008.5782727)
(hal-01841105) |
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Mathieu Moreau,
Daniela Munteanu,
Jean-Luc Autran,
Simulation Analysis of Quantum Confinement and Short-Channel Effects in Independent Double-Gate Metal–Oxide–Semiconductor Field-Effect Transistors, Japanese Journal of Applied Physics, 2008, 47, pp.7013 - 7018
(10.1143/JJAP.47.7013)
(hal-01745615) |
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Daniela Munteanu,
Mathieu Moreau,
Jean-Luc Autran,
Compact Model of the Ballistic Subthreshold Current in Independent Double-Gate MOSFETs, NSTI NANOTECH 2008, VOL 3, TECHNICAL PROCEEDINGS: MICROSYSTEMS, PHOTONICS, SENSORS, FLUIDICS, MODELING, AND SIMULATION, 2008, pp.877+
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(hal-01759433) |
