Maitre de Conférences
jeremy.postel-pellerin_AT_im2np.fr
04 13 55 40 37
Publications
| Publications |
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| Hassen Aziza, J. Postel-Pellerin, Moritz Fieback, Said Hamdioui, Hanzhi Xun, Mottaqiallah Taouil, K. Coulié, Rahajandraibe Wenceslas, Analysis of Conductance Variability in RRAM for Accurate Neuromorphic Computing, 25th IEEE Latin-American Test Symposium, 2024 () (hal-04540709) |
| Nicole Yazigy, J. Postel-Pellerin, G. Di Pendina, R.C. Sousa, V. Della Marca, Pierre Canet, Correlation between 1064 nm laser attack and thermal behavior in STT-MRAM, Microelectronics Reliability, 2023, 150, pp.115167 (10.1016/j.microrel.2023.115167) (hal-04524638) |
| Hassan Aziza, J. Postel-Pellerin, Mathieu Moreau, Experimental Analysis of Oxide-Based RAM Analog Synaptic Behavior, Electronics, 2022, 12, pp.49 (10.3390/electronics12010049) (hal-03941057) |
| Hassen Aziza, J. Postel-Pellerin, Mathieu Moreau, STATE: A Test Structure for Rapid and Reliable Prediction of Resistive RAM Endurance, IEEE Transactions on Device and Materials Reliability, 2022, 22, pp.500-505 (10.1109/TDMR.2022.3213191) (hal-03941082) |
| N. Yazigy, J. Postel-Pellerin, V. Della Marca, K. Terziyan, S. Nadifi, R.C. Sousa, P. Canet, G. Di Pendina, Experimental analysis on stochastic behavior of preswitching time in STT-MRAM, Microelectronics Reliability, 2022, 138, pp.114677 (10.1016/j.microrel.2022.114677) (hal-03941025) |
| F. Matteo, R. Simola, J. Postel-Pellerin, K. Coulié, 1T-NOR Flash memory after endurance degradation: An advanced TCAD simulation, European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, 2022, pp.114621 (10.1016/j.microrel.2022.114621) (hal-03941212) |
| N. Yazigy, J. Postel-Pellerin, V. Della Marca, K. Terziyan, S. Nadifi, R.C. Sousa, P. Canet, G. Di Pendina, Experimental analysis on stochastic behavior of preswitching time in STT-MRAM, European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, 2022 (10.1016/j.microrel.2022.114677) (hal-03941219) |
| Franck Matteo, Karine Coulié, Roberto Simola, J. Postel-Pellerin, Franck Melul, Arnaud Regnier, EEPROM endurance degradation at different temperatures: State of the art TCAD simulation, Microelectronics Reliability, 2022, 136, pp.114717 (10.1016/j.microrel.2022.114717) (hal-03941108) |
| F. Matteo, R. Simola, J. Postel-Pellerin, K. Coulie, Advanced TCAD Simulation of Tunnel Oxide Degradation for EEPROM Applications, IEEE 4th International Conference on Dielectrics (ICD 2022), 2022, pp.764-768 (10.1109/ICD53806.2022.9863611) (hal-03941192) |
| Hassen Aziza, J. Postel-Pellerin, Hussein Bazzi, Mathieu Moreau, Adnan Harb, STATE: A Test Structure for Rapid Prediction of Resistive RAM Electrical Parameter Variability, IEEE International Symposium on Circuits and Systems (ISCAS) 2022, 2022, pp.3532-3536 (10.1109/ISCAS48785.2022.9937716) (hal-03941188) |
| F. Matteo, R. Simola, J. Postel-Pellerin, K. Coulié, 1T-NOR Flash memory after endurance degradation: An advanced TCAD simulation, Microelectronics Reliability, 2022, 138, pp.114621 (10.1016/j.microrel.2022.114621) (hal-03941091) |
| N Yazigy, J. Postel-Pellerin, V. Della Marca, K Terziyan, R C Sousa, P Canet, Gregory Di Pendina, Real-time switching dynamics in STT-MRAM, IEEE Journal of the Electron Devices Society, 2022 (10.1109/jeds.2022.3185324) (hal-03708265) |
| Hussein Bazzi, J. Postel-Pellerin, Hassen Aziza, Mathieu Moreau, Adnan Harb, Resistive RAM SET and RESET Switching Voltage Evaluation as an Entropy Source for Random Number Generation, 2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2020, pp.1-4 (10.1109/DFT50435.2020.9250726) (hal-03504288) |
| Hassen Aziza, J. Postel-Pellerin, Hussein Bazzi, Pierre Canet, Mathieu Moreau, V. Della Marca, Adnan Harb, True Random Number Generator Integration in a Resistive RAM Memory Array Using Input Current Limitation, IEEE Transactions on Nanotechnology, 2020, 19, pp.214-222 (10.1109/TNANO.2020.2976735) (hal-03504843) |
| J. Postel-Pellerin, Hussein Bazzi, Hassen Aziza, Pierre Canet, Mathieu Moreau, V. Della Marca, Adnan Harb, True random number generation exploiting SET voltage variability in resistive RAM memory arrays, 2019 19th Non-Volatile Memory Technology Symposium (NVMTS), 2019, pp.1-5 (10.1109/NVMTS47818.2019.9043369) (hal-03504849) |
| Hassen Aziza, Hassan Bazzi, J. Postel-Pellerin, Pierre Canet, Mathieu Moreau, A. Harb, An Augmented OxRAM Synapse for Spiking Neural Network (SNN) Circuits, 2019 14th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS), 2019 (10.1109/DTIS.2019.8735057) (hal-02306907) |
| J. Postel-Pellerin, Gilles Micolau, Philippe Chiquet, Maminirina Joelson, Jean-Baptiste Decitre, A global modeling approach of the leakage phenomena in dielectrics, E3S Web of Conferences, 2019, 88, pp.05002 (10.1051/e3sconf/20198805002) (hal-02618292) |
| Philippe Chiquet, Maxime Chambonneau, V. Della Marca, J. Postel-Pellerin, Pierre Canet, Sarra Souiki Souiki-Figuigui, Guillaume Idda, Jean-Michel Portal, David Grojo, Phenomenological modelling of non-volatile memory threshold voltage shift induced by nonlinear ionization with a femtosecond laser, Scientific Reports, 2019, 9 (10.1038/s41598-019-43344-x) (hal-02137915) |
| M. Kharbouche-Harrari, Rana Alhalabi, J. Postel-Pellerin, Romain Wacquez, Driss Aboulkassimi, Etienne Nowak, Ioan Lucian Prejbeanu, Guillaume Prenat, Gregory Di Pendina, MRAM: from STT to SOT, for security and memory, XXXIII CONFERENCE ON DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS (DCIS), 2018 () (hal-01982788) |
| V. Della Marca, J. Postel-Pellerin, T. Kempf, A. Regnier, Philippe Chiquet, Marc Bocquet, Quantitative correlation between Flash and equivalent transistor for endurance electrical parameters extraction, Microelectronics Reliability, 2018, 88-90, pp.159 - 163 (10.1016/j.microrel.2018.06.116) (hal-01900789) |
| M. Kharbouche-Harrari, J. Postel-Pellerin, Gregory Di Pendina, R. Wacquez, D. Aboulkassimi, Marc Bocquet, R. Sousa, R. Delattre, M. Portal, Impact of a laser pulse on a STT-MRAM bitcell: security and reliability issues, 2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS), 2018, 2018, pp.243-244 (10.1109/IOLTS.2018.8474088) (hal-01976697) |
| Hassen Aziza, Pierre Canet, J. Postel-Pellerin, Impact of Line Resistance Combined with Device Variability on Resistive RAM Memories, Advances in Science, Technology and Engineering Systems Journal, 2018, 3, pp.11-17 (10.25046/aj030102) (hal-02335339) |
| Hassen Aziza, Pierre Canet, J. Postel-Pellerin, Mathieu Moreau, Jean-Michel Portal, Marc Bocquet, ReRAM ON/OFF resistance ratio degradation due to line resistance combined with device variability in 28nm FDSOI technology, 2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), 2017 (10.1109/ULIS.2017.7962594) (hal-01745666) |
| Maxime Chambonneau, Sarra Souiki Souiki-Figuigui, Philippe Chiquet, Vincenzo Della Marca, J. Postel-Pellerin, Pierre Canet, Jean-Michel Portal, David Grojo, Suppressing the memory state of floating gate transistors with repeated femtosecond laser backside irradiations, Applied Physics Letters, 2017, 110, pp.161112 - 161112 () (hal-01655116) |
| Thomas Sarno, Romain Wacquez, Edith Kussener, Philippe Maurine, Khalil Jradi, Jean-Michel Portal, Driss Aboulkassimi, Sarra Souiki-Figuigui, J. Postel-Pellerin, Pierre Canet, Maxime Chambonneau, David Grojo, Electromagnetic Analysis Perturbation using Chaos Generator, Truedevice 2016, 2016 () (hal-01455446) |
| J. Postel-Pellerin, Philippe Chiquet, V. Della Marca, Simulation of the programming efficiency and the energy consumption of Flash memories during endurance degradation, International Semiconductor Conference (CAS), 2016, 2016 (10.1109/SMICND.2016.7783052) (hal-01436469) |
| Pierre Canet, J. Postel-Pellerin, Hassen Aziza, Impact of Resistive Paths on NVM Array Reliability: Application to Flash & ReRAM Memories, 27th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF 2016), 2016 () (hal-01463140) |
| Pierre Canet, J. Postel-Pellerin, Hassen Aziza, Impact of resistive paths on NVM array reliability: Application to Flash & ReRAM memories, Microelectronics Reliability, 2016, 64, pp.36-41 (10.1016/j.microrel.2016.07.096) (hal-01434941) |
| Philippe Chiquet, J. Postel-Pellerin, C. Tuninetti, S. Souiki-Figuigui, P. Masson, Effect Of Short Pulsed Program/Erase Cycling On Flash Memory Devices, Workshop on New Perspectives in Measurements, Tools and Techniques for system’s reliability, maintainability and safety, 2016 () (hal-01437034) |
| V. Della Marca, M. Chambonneau, S. Souiki-Figuigui, J. Postel-Pellerin, Pierre Canet, Philippe Chiquet, Edith Kussener, F. Yengui, R. Wacquez, David Grojo, Jean-Michel Portal, M. Lisart, NVM cell degradation induced by femtosecond laser backside irradiation for reliability tests, 2016 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2016 (10.1109/IRPS.2016.7574580) (hal-01418479) |
| Philippe Chiquet, J. Postel-Pellerin, C. Tuninetti, S. Souiki-Figuigui, P. Masson, Enhancement of flash memory endurance using short pulsed program/erase signals, ACTA IMEKO, 2016, 5, pp.29-36 (10.21014/acta_imeko.v5i4.422) (hal-01451431) |
| J. Postel-Pellerin, Philippe Chiquet, Gilles Micolau, D. Boyer, Indirect measurement of low tunneling currents through dielectrics using floating gate structures, IEEE International Conference on Dielectrics (ICD), 2016, pp.1065-1068 () (hal-01594071) |
| Gilles Micolau, J. Postel-Pellerin, Philippe Chiquet, M. Joelson, Chahine Abbas, D. Boyer, Caroline Giroux, Toward an innovative stochastic modeling of electric charges losses trough dielectrics, Inter-Disciplinary Underground Science and Technology (i-DUST) Conference, 2016, 12, pp.9 (10.1051/e3sconf/20161204004) (hal-01451874) |
| Jonathan Bartoli, V. Della Marca, J. Postel-Pellerin, Julien Delalleau, Arnaud Regnier, Stephan Niel, Francesco La Rosa, Pierre Canet, Frédéric Lalande, Optimization of the ATW Non-Volatile Memory for Connected Smart Objects, 2015 IEEE International Memory Workshop (IMW), 2015 (10.1109/IMW.2015.7150299) (hal-01760536) |
| J. Bartoli, V. Della Marca, J. Delalleau, A. Regnier, S. Niel, F. Rosa, J. Postel-Pellerin, F. Lalande, A new non-volatile memory cell based on the flash architecture for embedded low energy applications: ATW (Asymmetrical Tunnel Window), 2014 International Semiconductor Conference (CAS), 2014 (10.1109/SMICND.2014.6966409) (hal-01760564) |
| J. Postel-Pellerin, Philippe Chiquet, V. Della Marca, T. Wakrim, G. Just, J.L. Ogier, Improving Flash memory endurance and consumption with ultra-short channel-hot-electron programming pulses, 2014 International Semiconductor Conference (CAS), 2014 (10.1109/SMICND.2014.6966433) (hal-01760566) |
| V. Della Marca, T. Wakrim, J. Postel-Pellerin, Pierre Canet, Advanced experimental setup for reliability and current consumption measurements of Flash non-volatile memories, IMEKO TC4, 2014 () (hal-01760548) |
| V. Della Marca, J. Postel-Pellerin, G. Just, Pierre Canet, J.-L. Ogier, Impact of endurance degradation on the programming efficiency and the energy consumption of NOR flash memories, Microelectronics Reliability, 2014, 54, pp.2262 - 2265 (10.1016/j.microrel.2014.07.063) (hal-01760459) |
| Philippe Chiquet, Pascal Masson, J. Postel-Pellerin, Romain Laffont, Gilles Micolau, Frédéric Lalande, Arnaud Regnier, Experimental setup for non-destructive measurement of tunneling currents in semiconductor devices, Measurement - Journal of the International Measurement Confederation (IMEKO), 2014, 54, pp.234-240 (10.1016/j.measurement.2014.02.015) (hal-01315418) |
| Philippe Chiquet, P. Masson, Gilles Micolau, R. Laffont, F. Lalande, J. Postel-Pellerin, A. Regnier, Determination of physical properties of semiconductor-oxide-semiconductor structures using a new fast gate current measurement protocol., 11th IEEE International Conference on Solid Dielectrics, 2013 () (hal-01315415) |
| V. Della Marca, L. Masoero, J. Postel-Pellerin, F. Lalande, J. Amouroux, J. Delalleau, Pierre Boivin, J-L. Ogier, G. Molas, Dynamic behavior of silicon nanocrystal memories during the hot carrier injection, IEEE International Conference on Solid Dielectrics (ICSD 2013), 2013 (10.1109/ICSD.2013.6619820) (hal-01760571) |
| V. Della Marca, J. Amouroux, G. Molas, J. Postel-Pellerin, F. Lalande, Pierre Boivin, J.-L. Ogier, Improved Performance of Silicon Nanocrystal Memories for Application Working Over a Wide Range of Temperature, ECS Transactions, 2013, 53, pp.129 - 139 (10.1149/05304.0129ecst) (hal-01760473) |
| V. Della Marca, G. Just, A. Regnier, L. Ogier, R. Simola, S. Niel, J. Postel-Pellerin, F. Lalande, L. Masoero, G. Molas, Push the flash floating gate memories toward the future low energy application, Solid-State Electronics, 2013, 79, pp.210 - 217 (10.1016/j.sse.2012.09.001) (hal-01760461) |
| Guillaume Just, V. Della Marca, Arnaud Regnier, Jean-Luc Ogier, J. Postel-Pellerin, Jean-Michel Portal, Pascal Le Masson, Effects of Lightly Doped Drain and Channel Doping Variations on Flash Memory Performances and Reliability, Journal of Low Power Electronics, 2012, 8, pp.717 - 724 (10.1166/jolpe.2012.1230) (hal-01760474) |
| V. Della Marca, J. Amouroux, G. Molas, J. Postel-Pellerin, F. Lalande, Pierre Boivin, E. Jalaguier, B. de Salvo, J.-L. Ogier, How to improve the silicon nanocrystal memory cell performances for low power applications, 2012 International Semiconductor Conference (CAS 2012), 2012 (10.1109/SMICND.2012.6400686) (hal-01760587) |
| V. Della Marca, L. Masoero, G. Molas, J. Amouroux, E. Petit-Faivre, J. Postel-Pellerin, F. Lalande, E. Jalaguier, S. Deleonibus, B. de Salvo, Pierre Boivin, J-L. Ogier, Optimization of programming consumption of silicon nanocrystal memories for low power applications, 2012 International Semiconductor Conference Dresden-Grenoble (ISCDG) - formerly known as the Semiconductor Conference Dresden (SCD), 2012 (10.1109/ISCDG.2012.6359988) (hal-01760573) |
| V. Della Marca, A. Regnier, J. Ogier, R. Simola, S. Niel, J. Postel-Pellerin, F. Lalande, G. Molas, Experimental study to push the Flash floating gate memories toward low energy applications, 2011 International Semiconductor Device Research Symposium (ISDRS), 2011, pp.73 - 77 (10.1109/ISDRS.2011.6135271) (hal-01760595) |
| V. Della Marca, Julien Amouroux, Julien Delalleau, Laurent Lopez, Jean-Luc Ogier, J. Postel-Pellerin, Frédéric Lalande, Gabriel Molas, Energy consumption optimization in nonvolatile silicon nanocrystal memories, 2011 International Semiconductor Conference (CAS 2011), 2011 (10.1109/SMICND.2011.6095810) (hal-01760593) |